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Chris Turner

Senior Test Engineer at ResMed

Chris will share his key insights into Design for Test (DfT), gained from decades in the industry.  On Wednesday there will be a Courtyard Room seminar, followed on Thursday by a seminar/workshop in one of the upstairs suites where Chris will review your design - if you're happy to share it among a group of like-minded attendees!  Your design can be uploaded while completing the Registration Form online.  Note that uploaded schematics must be in a searchable PDF format in irder to trace NETs etc.

You can find out more about Chris here: LinkedIn

Topics for Wednesday May 10:

1. A Brief History of Test (we are approaching full circle)
2. Design or Test, which is moving faster?
3. The easily misunderstood Purpose of Test
4. Typical PCBA Manufacturing Fault Spectrum
5. Common Test & Inspection Stages - Pro’s & Con’s (SPI, pre reflow AOI, post reflow AOI, MDA/flying probe/ICT, boundary-scan, BIST, FCT, system-test and the customer)
6. “Shift Left!” (The apocryphal ‘order of magnitude rule’ at each stage; a 10X cost increase is incurred)
7. EMS & Test-Developer selection (“world's best coffee!”?)
8. Is there an ideal Universal Test Strategy? (beware of snake oil)
9. Test Strategy drivers (risk, volume, available test and inspection equipment, skill availability, IP exposure, distance/time diff' EMS-OEM, project timelines, signal speed and cost)
10. Design For Test (what is the available test equipment capable of?, what level of diagnostic is required?, sub circuit isolation, floating inputs, protection devices, #TPs, etc)
11. Future-Proofing your design (saving you time and money)
12. Test Requirements (the bulk cannot come from a BOM or a System Spec)
13. Test Coverage Reports (smoke and mirrors, a refined view of PCOLASOQ[FAM])
14. Test System Qualification (methods, expected coverage, statistics, qualification runs with zero defects reported – I smell a rat!)
15. Setting of empirically derived test limits (the horrible reality you’re probably missing, is your data normally distributed?)
16. Change control at the EMS (and notification to the OEM!)
17. IPC Endorsed PCBA Quality Metrics (Cpk ☹, FPY ☹, DPMO 😊)
18. Help, I need a test expert! (where are they?)

Topics for Thursday May 11:

19. DFT Deep-Dive - tricks of the trade (have lots of TPs [if you can], drill all TPs even those not used!, safe powerup, NVM test logging, indirect xtal measurement, fast flashing - no I mean really fast!, uP I/O wiggle, BIST, IC ESD diodes, supercaps, testable TVS, protection devices, embedded controllers, cross-check tool [normal data?, missing test?, mean shift?, suggestions for new limits!], topside TPs bigger than bottom side, tooling holes/dents, panel or broken out?, and much more)
20. Interactive DFT (send your searchable PDF schematics in and we’ll see what we can do!)
21. Q&A

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